/*
 * Copyright 2024 NXP
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#ifndef _MCUX_CONFIG_H_
#define _MCUX_CONFIG_H_

#define CONFIG_FLASH_BASE_ADDRESS 0x08000000
#define DEBUG_CONSOLE_SYNCHRONIZATION_MODE 0
// #define SERIAL_MANAGER_NON_BLOCKING_MODE 0
// #define CONFIG_DBI_USE_MIPI_PANEL 0
#define CONFIG_LV_ATTRIBUTE_MEM_ALIGN 
#define CONFIG_LV_ATTRIBUTE_LARGE_CONST 
// #define MPU_SUPPORT 0
// #define USE_PERCEPIO_TRACELYZER 0

#endif /* _MCUX_CONFIG_H_ */
